1. Field of the Invention
The present invention relates to a data sensing module. More particularly, the present invention relates to a data sensing module of a flash memory.
2. Description of Related Art
Data stored in a memory are mostly binary bits, and a device is assigned to record a state of each bit being 0 or 1, wherein such device is referred to as a memory cell. In the memory, a data write or read operation of the selected memory cell is determined by an output signal of a control circuit. During the write operation, a predetermined memory cell is selected, and then the data to be written is stored in the selected memory cell. Comparatively, during the read operation, a predetermined memory cell is also selected, and then the state of the stored bit represented by a current or a voltage is recognized by a sensing circuit.
A flash memory is a random access memory capable of maintaining the stored data under a power-off state. Due to such characteristic, the flash memory is different to a dynamic random access memory (DRAM). Moreover, compared to a hard disk, the flash memory has a better dynamic shock resistance.
Generally, data accessing time of the flash memory determines a performance of the flash memory. In the flash memory, since a large amount of memory cells are coupled to the sensing circuit, a great amount of parasitic capacitances are generally generated in the sensing circuit, which may lead to an excessive load of the sensing circuit, and accordingly the data read speed is probably delayed.